1. Field of the Invention
The present invention relates to plasma display panels, and particularly to a surface-discharge type plasma display panel.
2. Description of the Background Art
FIG. 5 is a perspective view showing a first conventional structure of a surface-discharge type plasma display panel. In FIG. 5, the character 1 denotes a front glass substrate as a first glass substrate. The characters 2x.sub.n to 2x.sub.n+2 denote x sustain discharge electrodes formed of transparent conductive film, which are provided on the front glass substrate 1. The characters 2y.sub.n to 2y.sub.n+1 denote y sustain discharge electrodes formed of transparent conductive film, which are provided on the front glass substrate 1. In this background art, these x sustain discharge electrodes and the corresponding ones of the y sustain discharge electrodes, e.g., the x sustain discharge electrode 2x.sub.n and the y sustain discharge electrode 2y.sub.n, are provided adjacently and in parallel with each other to form one set.
The characters 3x.sub.n to 3x.sub.n+2 denote x bus electrodes that are laid on the x sustain discharge electrodes 2x.sub.n to 2x.sub.n+2 to supply voltage to the x sustain discharge electrodes 2x.sub.n to 2x.sub.n+2. For example, the x bus electrode 3x.sub.n supplies voltage to the x sustain discharge electrode 2x.sub.n. The characters 3y.sub.n to 3y.sub.n+1 denote y bus electrodes laid on the y sustain discharge electrodes 2y.sub.n to 2y.sub.n+1 for supplying voltage to the y sustain discharge electrodes 2y.sub.n to 2y.sub.n+1. For example, the y bus electrode 3y.sub.n supplies voltage to the y sustain discharge electrode 2y.sub.n. The x bus electrodes and the y bus electrodes in this background art, e.g., the x bus electrode 3x.sub.n and the y bus electrode 3y.sub.n, are provided adjacently and in parallel with each other to form one set.
The character 4 denotes a dielectric layer, which covers the x sustain discharge electrodes 2x.sub.n to 2x.sub.n+2, the y sustain discharge electrodes 2y.sub.n to 2y.sub.n+1, the x bus electrodes 3x.sub.n to 3x.sub.n+2, and the y bus electrodes 3y.sub.n to 3y.sub.n+1. The character 5 denotes a cathode film formed of magnesium oxide (hereinafter referred to as MgO), which is deposited on the dielectric layer 4 and functions as a protector and a cathode when discharging. The character 6 denotes a rear glass substrate as a second glass substrate, which forms a pair with the front glass substrate 1 with the dielectric layer 4 and the like therebetween.
The character 7 denotes address electrodes, which are arranged on the rear glass substrate 6 in a direction normal to the direction in which the x sustain discharge electrodes 2x.sub.n to 2x.sub.n+2 and the y sustain discharge electrodes 2y.sub.n to 2y.sub.n+1 extend. A discharge space is provided between the cathode film 5 and the address electrodes 7. This discharge space is filled with mixture gas containing neon (Ne) and xenon (Xe). The character 8 denotes barrier ribs (hereinafter referred to as partitions), which are provided between adjacent address electrodes 7. The projecting ends of the partitions 8 are in contact with the cathode film 5 to divide the discharge space into a plurality of cells.
The characters 9R, 9G and 9B denote red, green, and blue phosphors, respectively, which are applied on the surface of the address electrodes 7 and the side wall of partitions 8. The character 10 denotes discharge deactivation films, which are placed to face the spaces between the y sustain discharge electrodes and x sustain discharge electrodes in adjacent sets, e.g., the space between the y sustain discharge electrode 2y.sub.n and the x sustain discharge electrode 2x.sub.n+1, with the dielectric layer 4 and the cathode film 5 interposed therebetween. This discharge deactivation films 10 are formed of an insulating material. The width of the discharge deactivation films 10 does not exceed the sum of the widths of a y sustain discharge electrode and an x sustain discharge electrode in adjacent sets and the width of the interval between the y sustain discharge electrode and the x sustain discharge electrode in the adjacent sets.
Next, the driving sequence, or the operation of the surface-discharge type plasma display panel described referring to FIG. 5 will be described.
Step A1: Line-Sequential Write Discharge
The y sustain discharge electrodes 2y.sub.n to 2y.sub.n+1 are line-sequentially scanned. Picture signal corresponding to the image data to be outputted to the plasma display panel is outputted to the address electrodes 7 in synchronization with the line-sequential scanning. This causes write discharge, or the AC discharge at the intersections of the y sustain discharge electrodes 2y.sub.n to 2y.sub.n+1 and the address electrodes 7 between 2y.sub.n and 2x.sub.n, or between 2y.sub.n+1 and 2x.sub.n+1. Then wall charge is accumulated on the surface of the cathode film 5 in the vicinities of the y sustain discharge electrodes 2y.sub.n to 2y.sub.n+1 that have made the write discharge. On the other hand, wall charge of the opposite polarity is accumulated on the surface of the cathode film 5 in the vicinities of the x sustain discharge electrodes 2x.sub.n to 2x.sub.n+1.
Step A2: Sustain Discharge between x and y
The line-sequential write discharge is followed by sustain discharge, or the AC discharge for sustaining the discharge state between the y sustain discharge electrodes 2y.sub.n to 2y.sub.n+1 that have made the write discharge and the corresponding ones of the x sustain discharge electrodes 2x.sub.n to 2x.sub.n+2, e.g., between the y sustain discharge electrode 2y.sub.n and the x sustain discharge electrode 2x.sub.n.
Step A3: Entire-Surface Write Discharge
Independently of the presence/absence of wall charge accumulated on the surface of the cathode film 5, a voltage required to make write discharge is applied between the opposing x sustain discharge electrodes 2x.sub.n to 2x.sub.n+2 and y sustain discharge electrodes 2y.sub.n to 2y.sub.n+1 laid on the entire surface of the front glass substrate 1.
Step A4: Entire-Surface Erase Discharge
Erase pulse is applied between the opposing x sustain discharge electrodes 2x.sub.n to 2x.sub.n+2 and y sustain discharge electrodes 2y.sub.n to 2y.sub.n+1 laid on the entire surface of the front glass substrate 1 to erase wall charge unwanted in the next driving sequence A1.
The phosphor 9R receives ultra-violet rays emitted in the process of discharge to emit fluorescent red color. Similarly, the phosphor 9G emits green color and the phosphor 9B emits blue color.
FIG. 6 is a sectional view of the conventional surface-discharge type plasma display panel shown in FIG. 5. This sectional view of the plasma display panel in FIG. 6 does not show the rear glass substrate 6, the address electrodes 7, the partitions 8 and the phosphors 9R, 9G and 9B. This technique is disclosed in Japanese Patent Laying-Open No.9-102280, for example.
FIG. 7 is a sectional view showing a second conventional structure of a surface-discharge type plasma display panel. In FIG. 7, the same reference characters as those in the conventional example shown in FIG. 5 and FIG. 6 show the same or corresponding parts, which are not described here again. In this conventional example, one x sustain discharge electrode, e.g., the x sustain discharge electrode 2x.sub.m, is provided between two y sustain discharge electrodes, e.g., between the y sustain discharge electrode 2y.sub.n and the y sustain discharge electrode 2y.sub.n+1.
In this conventional example, one x bus electrode and two y bus electrodes form one set. This technique is disclosed in Japanese Patent Laying-Open No.2-226639, for example. The plasma display panel of the second structure has nothing corresponding to the discharge deactivation films 10 provided in the plasma display panel of the first structure.
For the aim of improving the light emission luminance of the surface-discharge type plasma display panel of the first structure to obtain a comfortable-to-see plasma display panel, it is necessary to arrange the opposing x bus electrodes 3x.sub.n to 3x.sub.n+2 and y bus electrodes 3y.sub.n to 3y.sub.n+1 in the respective sets, e.g., the y bus electrode 3y.sub.n and the x bus electrode 3x.sub.n, at large intervals or gaps.
However, forming large gaps on the front glass substrate 1 between the opposing x bus electrodes 3x.sub.n to 3x.sub.n+2 and y bus electrodes 3y.sub.n to 3y.sub.n+1 in their respective sets, e.g., the gap between the y bus electrode 3y.sub.n and the x bus electrode 3x.sub.n, is restricted because of the limited space of the front glass substrate 1. Furthermore, this raises the problem that the gaps between adjacent ones of the x bus electrodes 3x.sub.n to 3x.sub.n+2 and the y bus electrodes 3y.sub.n to 3y.sub.n+1, e.g., the gap between the y bus electrode 3y.sub.n-1 and the x bus electrode 3x.sub.n, become smaller, which will be liable to cause erroneous discharge between adjacent bus electrodes in different sets, e.g., between the y bus electrode 3y.sub.n-1 and the x bus electrode 3x.sub.n.
The erroneous discharge between adjacent bus electrodes in different sets, e.g., between the y bus electrode 3y.sub.n-1 and the x bus electrode 3x.sub.n can be prevented by forming the discharge deactivation films 10 in positions facing the spaces between, e.g., the y bus electrode 3y.sub.n-1 and the x bus electrode 3x.sub.n through the dielectric layer 4 and the cathode film 5.
It can be understood that the plasma display panel of the second structure corresponds to an improvement of the plasma display panel of the first structure made to decrease the total number of the x bus electrodes and y bus electrodes provided on the front glass substrate having a given number of cells by allowing two y bus electrodes to share one x bus electrode so that the facing x and y bus electrodes can be spaced at increased gaps to improve the light emission luminance for comfortable-to-see display.
However, in the plasma display panel of the second structure, when discharge starts between the y sustain discharge electrode 2y.sub.n and the x sustain discharge electrode 2x.sub.m, for example, the wall charge accumulated before that on the cathode film 5 in the region above the x sustain discharge electrode 2x.sub.m is uniformly reduced. Then the rise of discharge occurring thereafter between the y sustain discharge electrode 2y.sub.n+1 sharing the x sustain discharge electrode 2x.sub.m with the y sustain discharge electrode 2y.sub.n and the x sustain discharge electrode 2x.sub.m will be especially unstable.
Furthermore, with the plasma display panel of the second structure, when the intervals between two adjacent y sustain discharge electrodes in adjacent sets, e.g., the interval between the y sustain discharge electrode 2y.sub.n-1 and the y sustain discharge electrode 2y.sub.n, are small, the x sustain discharge electrode 2x.sub.m and the y sustain discharge electrode 2y.sub.n-1, for example, are prone to erroneously make discharge, involved in the discharge between the x sustain discharge electrode 2x.sub.m and the y sustain discharge electrode 2y.sub.n.